From Contamination to Defects, Faults and Yield Loss

From Contamination to Defects, Faults and Yield Loss

Author: Jitendra B. Khare

Publisher: Springer Science & Business Media

ISBN: 9781461313779

Category: Technology & Engineering

Page: 150

View: 767

Download Now
Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.
From Contamination to Defects, Faults and Yield Loss
Language: en
Pages: 150
Authors: Jitendra B. Khare, Wojciech Maly
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital
From Contamination to Defects, Faults and Yield Loss
Language: en
Pages: 172
Authors: Jitendra B Khare, Wojciech Maly
Categories: Technology & Engineering
Type: BOOK - Published: 1996-04-01 - Publisher:

Books about From Contamination to Defects, Faults and Yield Loss
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits
Language: en
Pages: 328
Authors: Manoj Sachdev, José Pineda de Gyvez
Categories: Technology & Engineering
Type: BOOK - Published: 2007-06-04 - Publisher: Springer Science & Business Media

The 2nd edition of defect oriented testing has been extensively updated. New chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering have been added to provide a link between defect sources and yield. The chapter on RAM testing has been updated with focus on parametric and
Models in Hardware Testing
Language: en
Pages: 257
Authors: Hans-Joachim Wunderlich
Categories: Computers
Type: BOOK - Published: 2009-11-12 - Publisher: Springer Science & Business Media

Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation,
Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation
Language: en
Pages: 241
Authors: Alfredo Benso, Paolo Prinetto
Categories: Technology & Engineering
Type: BOOK - Published: 2006-04-11 - Publisher: Springer Science & Business Media

This is a comprehensive guide to fault injection techniques used to evaluate the dependability of a digital system. The description and the critical analysis of different fault injection techniques and tools are authored by key scientists in the field of system dependability and fault tolerance.