Models for Large Integrated Circuits

Models for Large Integrated Circuits

Author: Patrick DeWilde

Publisher: Springer Science & Business Media

ISBN: 9781461315551

Category: Technology & Engineering

Page: 220

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A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by factors of four in overall complexity -requires a substantial increase in density from the current technology, added precision, a decrease of the size of geometric features, and an increase in the total usable surface. The microelectronic industry has set the trend. Ultra large funds have been invested in the construction of new plants to produce the ultra large-scale circuits with utmost precision under the most severe conditions. The decrease in feature size to submicrons -0.7 micron is quickly becoming availabl- does not only bring technological problems. New design problems arise as well. The elements from which microelectronic circuits are build, transistors and interconnects, have different shape and behave differently than before. Phenomena that could be neglected in a four micron technology, such as the non-uniformity of the doping profile in a transistor, or the mutual capacitance between two wires, now play an important role in circuit design. This situation does not make the life of the electronic designer easier: he has to take many more parasitic effects into account, up to the point that his ideal design will not function as originally planned.
Models for Large Integrated Circuits
Language: en
Pages: 220
Authors: Patrick DeWilde, Zhen-Qiu Ning
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by
Models for Large Integrated Circuits
Language: en
Pages: 220
Authors: Patrick DeWilde, Zhen-Qiu Ning
Categories: Technology & Engineering
Type: BOOK - Published: 2012-01-04 - Publisher: Springer

A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by
Symbolic Analysis for Automated Design of Analog Integrated Circuits
Language: en
Pages: 290
Authors: Georges Gielen, Willy M.C. Sansen
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

It is a great honor to provide a few words of introduction for Dr. Georges Gielen's and Prof. Willy Sansen's book "Symbolic analysis for automated design of analog integrated circuits". The symbolic analysis method presented in this book represents a significant step forward in the area of analog circuit design.
Neural Models and Algorithms for Digital Testing
Language: en
Pages: 184
Authors: S.T. Chadradhar, Vishwani Agrawal, M. Bushnell
Categories: Computers
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9 QUADRATIC 0-1 PROGRAMMING 8S 9. 1 Energy Minimization 86 9. 2 Notation and Tenninology . . . . .
Digital Integrated Circuits
Language: en
Pages: 320
Authors: Evgeni Perelroyzen
Categories: Computers
Type: BOOK - Published: 2018-10-03 - Publisher: CRC Press

A current trend in digital design-the integration of the MATLAB® components Simulink® and Stateflow® for model building, simulations, system testing, and fault detection-allows for better control over the design flow process and, ultimately, for better system results. Digital Integrated Circuits: Design-for-Test Using Simulink® and Stateflow® illustrates the construction of Simulink